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https://github.com/GNS3/gns3-server.git
synced 2026-11-03 05:51:15 +02:00
Merge branch '2.0' into 2.1
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@@ -188,22 +188,33 @@ class ATMSwitch(Device):
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raise DynamipsError("Port {} is not allocated".format(port_number))
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# remove VCs mapped with the port
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pvc_entry = re.compile(r"""^([0-9]*):([0-9]*):([0-9]*)$""")
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for source, destination in self._active_mappings.copy().items():
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match_source_pvc = pvc_entry.search(source)
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match_destination_pvc = pvc_entry.search(destination)
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if match_source_pvc and match_destination_pvc:
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if len(source) == 3 and len(destination) == 3:
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# remove the virtual channels mapped with this port/nio
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source_port, source_vpi, source_vci = map(int, match_source_pvc.group(1, 2, 3))
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destination_port, destination_vpi, destination_vci = map(int, match_destination_pvc.group(1, 2, 3))
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source_port, source_vpi, source_vci = source
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destination_port, destination_vpi, destination_vci = destination
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if port_number == source_port:
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log.info('ATM switch "{name}" [{id}]: unmapping VCC between port {source_port} VPI {source_vpi} VCI {source_vci} and port {destination_port} VPI {destination_vpi} VCI {destination_vci}'.format(name=self._name,
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id=self._id,
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source_port=source_port,
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source_vpi=source_vpi,
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source_vci=source_vci,
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destination_port=destination_port,
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destination_vpi=destination_vpi,
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destination_vci=destination_vci))
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yield from self.unmap_pvc(source_port, source_vpi, source_vci, destination_port, destination_vpi, destination_vci)
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yield from self.unmap_pvc(destination_port, destination_vpi, destination_vci, source_port, source_vpi, source_vci)
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else:
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# remove the virtual paths mapped with this port/nio
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source_port, source_vpi = map(int, source.split(':'))
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destination_port, destination_vpi = map(int, destination.split(':'))
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source_port, source_vpi = source
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destination_port, destination_vpi = destination
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if port_number == source_port:
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log.info('ATM switch "{name}" [{id}]: unmapping VPC between port {source_port} VPI {source_vpi} and port {destination_port} VPI {destination_vpi}'.format(name=self._name,
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id=self._id,
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source_port=source_port,
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source_vpi=source_vpi,
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destination_port=destination_port,
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destination_vpi=destination_vpi))
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yield from self.unmap_vp(source_port, source_vpi, destination_port, destination_vpi)
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yield from self.unmap_vp(destination_port, destination_vpi, source_port, source_vpi)
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@@ -239,6 +250,14 @@ class ATMSwitch(Device):
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if self.has_port(destination_port):
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if (source_port, source_vpi, source_vci) not in self._active_mappings and \
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(destination_port, destination_vpi, destination_vci) not in self._active_mappings:
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log.info('ATM switch "{name}" [{id}]: mapping VCC between port {source_port} VPI {source_vpi} VCI {source_vci} and port {destination_port} VPI {destination_vpi} VCI {destination_vci}'.format(name=self._name,
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id=self._id,
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source_port=source_port,
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source_vpi=source_vpi,
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source_vci=source_vci,
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destination_port=destination_port,
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destination_vpi=destination_vpi,
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destination_vci=destination_vci))
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yield from self.map_pvc(source_port, source_vpi, source_vci, destination_port, destination_vpi, destination_vci)
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yield from self.map_pvc(destination_port, destination_vpi, destination_vci, source_port, source_vpi, source_vci)
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else:
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@@ -247,6 +266,12 @@ class ATMSwitch(Device):
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destination_port, destination_vpi = map(int, destination.split(':'))
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if self.has_port(destination_port):
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if (source_port, source_vpi) not in self._active_mappings and (destination_port, destination_vpi) not in self._active_mappings:
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log.info('ATM switch "{name}" [{id}]: mapping VPC between port {source_port} VPI {source_vpi} and port {destination_port} VPI {destination_vpi}'.format(name=self._name,
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id=self._id,
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source_port=source_port,
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source_vpi=source_vpi,
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destination_port=destination_port,
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destination_vpi=destination_vpi))
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yield from self.map_vp(source_port, source_vpi, destination_port, destination_vpi)
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yield from self.map_vp(destination_port, destination_vpi, source_port, source_vpi)
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@@ -262,10 +287,10 @@ class ATMSwitch(Device):
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"""
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if port1 not in self._nios:
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raise DynamipsError("Port {} is not allocated".format(port1))
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return
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if port2 not in self._nios:
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raise DynamipsError("Port {} is not allocated".format(port2))
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return
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nio1 = self._nios[port1]
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nio2 = self._nios[port2]
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@@ -283,7 +308,7 @@ class ATMSwitch(Device):
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port2=port2,
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vpi2=vpi2))
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self._active_mappings["{}:{}".format(port1, vpi1)] = "{}:{}".format(port2, vpi2)
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self._active_mappings[(port1, vpi1)] = (port2, vpi2)
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@asyncio.coroutine
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def unmap_vp(self, port1, vpi1, port2, vpi2):
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@@ -297,10 +322,10 @@ class ATMSwitch(Device):
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"""
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if port1 not in self._nios:
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raise DynamipsError("Port {} is not allocated".format(port1))
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return
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if port2 not in self._nios:
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raise DynamipsError("Port {} is not allocated".format(port2))
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return
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nio1 = self._nios[port1]
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nio2 = self._nios[port2]
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@@ -318,7 +343,7 @@ class ATMSwitch(Device):
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port2=port2,
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vpi2=vpi2))
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del self._active_mappings["{}:{}".format(port1, vpi1)]
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del self._active_mappings[(port1, vpi1)]
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@asyncio.coroutine
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def map_pvc(self, port1, vpi1, vci1, port2, vpi2, vci2):
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@@ -334,10 +359,10 @@ class ATMSwitch(Device):
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"""
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if port1 not in self._nios:
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raise DynamipsError("Port {} is not allocated".format(port1))
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return
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if port2 not in self._nios:
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raise DynamipsError("Port {} is not allocated".format(port2))
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return
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nio1 = self._nios[port1]
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nio2 = self._nios[port2]
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@@ -359,7 +384,7 @@ class ATMSwitch(Device):
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vpi2=vpi2,
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vci2=vci2))
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self._active_mappings["{}:{}:{}".format(port1, vpi1, vci1)] = "{}:{}:{}".format(port2, vpi2, vci2)
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self._active_mappings[(port1, vpi1, vci1)] = (port2, vpi2, vci2)
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@asyncio.coroutine
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def unmap_pvc(self, port1, vpi1, vci1, port2, vpi2, vci2):
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@@ -375,10 +400,10 @@ class ATMSwitch(Device):
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"""
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if port1 not in self._nios:
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raise DynamipsError("Port {} is not allocated".format(port1))
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return
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if port2 not in self._nios:
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raise DynamipsError("Port {} is not allocated".format(port2))
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return
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nio1 = self._nios[port1]
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nio2 = self._nios[port2]
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@@ -399,7 +424,7 @@ class ATMSwitch(Device):
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port2=port2,
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vpi2=vpi2,
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vci2=vci2))
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del self._active_mappings["{}:{}:{}".format(port1, vpi1, vci1)]
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del self._active_mappings[(port1, vpi1, vci1)]
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@asyncio.coroutine
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def start_capture(self, port_number, output_file, data_link_type="DLT_ATM_RFC1483"):
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@@ -103,8 +103,8 @@ class Bridge(Device):
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:param nio: NIO instance to remove
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"""
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yield from self._hypervisor.send('nio_bridge remove_nio "{name}" {nio}'.format(name=self._name, nio=nio))
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if self._hypervisor:
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yield from self._hypervisor.send('nio_bridge remove_nio "{name}" {nio}'.format(name=self._name, nio=nio))
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self._nios.remove(nio)
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@property
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@@ -246,7 +246,7 @@ class EthernetSwitch(Device):
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elif settings["type"] == "dot1q":
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yield from self.set_dot1q_port(port_number, settings["vlan"])
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elif settings["type"] == "qinq":
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yield from self.set_qinq_port(port_number, settings["vlan"], settings["ethertype"])
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yield from self.set_qinq_port(port_number, settings["vlan"], settings.get("ethertype"))
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@asyncio.coroutine
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def set_access_port(self, port_number, vlan_id):
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@@ -191,9 +191,15 @@ class FrameRelaySwitch(Device):
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# remove VCs mapped with the port
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for source, destination in self._active_mappings.copy().items():
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source_port, source_dlci = map(int, source.split(':'))
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destination_port, destination_dlci = map(int, destination.split(':'))
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source_port, source_dlci = source
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destination_port, destination_dlci = destination
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if port_number == source_port:
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log.info('Frame Relay switch "{name}" [{id}]: unmapping VC between port {source_port} DLCI {source_dlci} and port {destination_port} DLCI {destination_dlci}'.format(name=self._name,
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id=self._id,
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source_port=source_port,
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source_dlci=source_dlci,
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destination_port=destination_port,
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destination_dlci=destination_dlci))
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yield from self.unmap_vc(source_port, source_dlci, destination_port, destination_dlci)
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yield from self.unmap_vc(destination_port, destination_dlci, source_port, source_dlci)
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@@ -224,6 +230,13 @@ class FrameRelaySwitch(Device):
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destination_port, destination_dlci = map(int, destination.split(':'))
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if self.has_port(destination_port):
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if (source_port, source_dlci) not in self._active_mappings and (destination_port, destination_dlci) not in self._active_mappings:
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log.info('Frame Relay switch "{name}" [{id}]: mapping VC between port {source_port} DLCI {source_dlci} and port {destination_port} DLCI {destination_dlci}'.format(name=self._name,
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id=self._id,
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source_port=source_port,
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source_dlci=source_dlci,
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destination_port=destination_port,
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destination_dlci=destination_dlci))
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yield from self.map_vc(source_port, source_dlci, destination_port, destination_dlci)
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yield from self.map_vc(destination_port, destination_dlci, source_port, source_dlci)
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@@ -260,7 +273,7 @@ class FrameRelaySwitch(Device):
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port2=port2,
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dlci2=dlci2))
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self._active_mappings["{}:{}".format(port1, dlci1)] = "{}:{}".format(port2, dlci2)
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self._active_mappings[(port1, dlci1)] = (port2, dlci2)
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@asyncio.coroutine
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def unmap_vc(self, port1, dlci1, port2, dlci2):
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@@ -294,7 +307,7 @@ class FrameRelaySwitch(Device):
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dlci1=dlci1,
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port2=port2,
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dlci2=dlci2))
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del self._active_mappings["{}:{}".format(port1, dlci1)]
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del self._active_mappings[(port1, dlci1)]
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@asyncio.coroutine
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def start_capture(self, port_number, output_file, data_link_type="DLT_FRELAY"):
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@@ -71,7 +71,10 @@ class Router(BaseNode):
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super().__init__(name, node_id, project, manager, console=console, aux=aux, allocate_aux=aux)
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self._working_directory = os.path.join(self.project.module_working_directory(self.manager.module_name.lower()), self.id)
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os.makedirs(os.path.join(self._working_directory, "configs"), exist_ok=True)
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try:
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os.makedirs(os.path.join(self._working_directory, "configs"), exist_ok=True)
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except OSError as e:
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raise DynamipsError("Can't create the dynamips config directory: {}".format(str(e)))
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if dynamips_id:
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self._convert_before_2_0_0_b3(dynamips_id)
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